CMOS active pixel sensors are used in a wide range of imaging applications. The active pixel sensor includes a photodiode acting as a light sensing means. The photo-generated current is being integrated on the self-capacitance of the photodiode. This charge is essentially an analog representation of the light received by the active pixel sensor during the integration period. When a digital signal is desired, it is necessary to convert this analog signal to a digital representation by means of A-D conversion
In most applications, multiple CMOS active pixel sensors are used, where the CMOS active pixel sensors are arranged to form an array. Most of the active pixel sensor array use one or more A-D converters 110 located off the active pixel sensor array 120, as shown in FIG. 1. Such arrangement allows a more compact active pixel sensor array being constructed, and, as a result, will enhance the overall circuit efficiency, and thus reduce the cost of the overall product. However, such off active pixel sensor array A-D conversion arrangement suffers from the problem of requiring a relative complex switching or multiplexing circuitry to transfer the analog signal from individual active pixel sensor to the A-D converters. In case of very large active pixel sensor array, it will be very difficult, if not impossible to construct the necessary switching or multiplexing circuit, and hence poor image quality will be obtained.
It has been proposed in literature that each pixel should has its own A-D converter, such that the resulting pixel sensor will output digital signals in a particular encoded form to ease the switching and multiplexing problem. See, e.g., IEEE Journal Solid State Physics, December 2001, vol. 36, no. 12, pp. 2049 and U.S. Pat. Nos. 5,461,425, 5,801,657, 6,271,785 and 6,969,879. However, such architecture has the problem that the additional circuitry required to integrate the A-D converter into the active pixel sensor severely enlarges the size of the resulting sensing array, and thus increase the cost of production.
In U.S. Pat. No. 6,969,879, a distributed form has been proposed to embed the A-D converter inside the CMOS active pixel sensor, such that the resulting active pixel sensing array size is comparable to that of the traditional architecture that use analog output and off-array A-D converters. However, this and other proposed CMOS active pixel sensor with in-pixel A-D converter suffers from the problem of mismatched transistors. Within an A-D converter, there is typically a comparator that compares the analog signal from the photodiode 210 to a reference voltage that helps to determine the digital representation of the analog signal of the photodiode, as shown in FIG. 2. Such comparators are conventionally constructed using a differential pair of transistors M3 and M4, as shown in FIG. 3. One of the performance limitations for this type of approach is the input offset due to transistors mismatch of the differential pair. Such offset voltage will results in a “fixed pattern” noise in the final output, and thus lowered the quality of the captured image from the sensor array.
Another problem of such differential pair is the relatively large power consumption. In order to maintain a fast conversion speed, the differential pair transistors are biased in the active region, and thus consume static power. In case of a large sensor array is under concern, the total power consumption will be very high that it will preclude the above devices to use in a lot of applications, such as portable applications, etc. where the battery power is limited. Secondly, the large power consumption will induce a large amount of heat that will increase the packaging cost since efficient heat dissipation package is required. Nevertheless, such image-sensing array with high heat dissipation may still be not useful in applications where limited device area is available, such as portable applications.
Lastly, such comparators, which make use of differential transistor pairs are still too large to be embedded inside each pixel. To remedy this problem, U.S. Pat. No. 6,969,879 proposed a distributed structure in order to reduce the average number of transistor per pixel, thus the total size of the sensor array. In U.S. Pat. No. 6,969,879, the comparator is divided into input stage that contain the differential transistors pair and the output stage that contains the current mirror providing currents to the differential transistors pair (M3 and M4). Each pixel will contain its own differential transistor pairs, however, pixels along the same column will share the same current mirror (M5, M6, M7 and M8) for all the differential transistors pair. Using such distributed comparator architecture, the total number of transistors is reduced at the expense of increased offset voltage. As a result, high quality image sensor cannot be constructed using such distributed architecture.
There is thus a need to improve the way to embed the comparator within the CMOS active pixel sensor for A-D conversion without the transistor-matching problem, the high power consumption problem, and with a small number of average transistors per pixel.